CY91570 | Cypress Semiconductor
CY91570
Based on Cypress' proprietary high performance FR81S core, these automotive MCUs offer high computing performance combined with a rich peripheral feature set which make them highly suitable for vehicle instrumentation cluster applications. Maximum 6 channels of Stepper Motor Controller provide cost efficient electro-mechanical cluster design. All members of the CY91570 series are based on Cypress' Flash Memory technology offering program storage as well as a separate Work Flash as E2PROM emulation memory.
High Performance
A proprietary 32-bit RISC CPU core features an operating speed up to 128 MHz, with 160 DMIPS performance. This high-level RISC core, which is based on a Harvard architecture with separated instruction and data bus, is optimized for applications that require high-speed control. An optimized instruction set assures low-code-size densities and high execution speeds.
The latest generation in the FR81 features an improved CPU core with an enhanced instruction pipeline for reduced branch penalty. The newest members of the family (the CY91520, CY91570, CY91580 and CY91590 MCU-series) also include a single, precision Floating Point Unit (FPU), providing the extra computing power that complex control algorithms require.
Highly Reliable Flash Memory
Memory densities range from 384KB to 2MB Flash. The highly reliable, high-speed Flash memory has an endurance of 100,000 write/erase cycles with up to 20 years of data retention.
Instrument Cluster Support
Highly optimized for automotive instrument cluster application with high-current stepper motor controller/driver, with segment LCD controller/driver which enables optimized and best performance design in the application category.
Communications Interfaces
The devices include Controller Area Network (CAN), FlexRay and Local Interconnect Network (LIN) interfaces. These interfaces, combined with the large, on-chip memory capacity, enable efficient data collection, processing and distribution. Many devices offer an external bus interface that can e.g. be connected to Cypress' standalone FlexRay controller or to the latest generation of graphics controllers to build full-featured dashboards, driver-information and advanced driver-assistance systems.
Development Tools
Cypress and its external partners offer a full set of development tools such as starter kits, hardware and software debuggers, and third-party-supported automotive operating systems like AUTOSAR and OSEK.
| Product Name | Maximum Internal Clock [MHz] | Floating Point Unit | Memory Protection Unit | Package [pin] | Operating Voltage: VCC[V] | Sub Clock | Memory Type | ROM [Byte] | RAM [Byte] | Cache [KByte] | DMAC [ch] | Ext. Interrupt [ch] | External Bus I/F | Max. I/O port [ch] | 10-bit ADC [ch x unit] | 12-bit ADC [ch x unit] | DAC [ch] | Output Compare [ch] | Free-Run Timer [ch] | Input Capture [ch] | Reload Timer, PWM Timer, PWC Timer, PPG Timer / Base Timer (Reload/PPG/PWM/PWC Selectable) [ch] | Up/Down Counter [ch] | Other timers [ch] | Three-phase Inverter Support | I2C, UART/SI, SIO, Multi Function Serial - MFS (MFS: LIN/UART/SIO/I2C Selectable) [ch] | LIN/UART/SIO [ch] | CAN [ch] | FlexRay [unit] | MediaLB | Ethernet AVB | LCD Controller Driver [seg x com] | Stepper Motor Controller Driver [ch] | Graphic Display Controller | Sound Generator | Resolver to Digital Converter | Secure Hardware Extention | Remarks | Evaluation Method / Device |
|---|
| CY91F575B | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 576K + 64K | 48K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F575BS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 576K + 64K | 48K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F575BH | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 576K + 64K | 48K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F575BHS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 576K + 64K | 48K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F577B | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1088K + 64K | 72K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F577BS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1088K + 64K | 72K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F577BH | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1088K + 64K | 72K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F577BHS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1088K + 64K | 72K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F578C | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F578CS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F578CH | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F578CHS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F579C | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F579CS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F579CH | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 109 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F579CHS | 80 | Yes | Yes | LQFP-144 | 4.5 to 5.5 | - | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 111 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F578CM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 157 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F578CSM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 159 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F578CHM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 157 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F578CHSM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | - | Main Flash + Work Flash | 1600K + 64K | 112K | - | 16 | 16 | Yes | 159 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F579CM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 157 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F579CSM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | - | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 159 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "On" | On-chip Debug |
| CY91F579CHM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | Yes | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 157 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
| CY91F579CHSM | 80 | Yes | Yes | LQFP-208 | 4.5 to 5.5 | - | Main Flash + Work Flash | 2112K + 64K | 144K | - | 16 | 16 | Yes | 159 | 40 x 1 | - | 8bit x 2 | 12 | 6 | 12 | Reload Timer x 7 (3ch for Periodic Timer Interrupt Occurrence) + PPG Timer x 24 + Base Timer x 2 | 2 | - | - | MFS x 4 (I2C supports only ch0/ch1) | 6 | 32Msg-buffer x 2 + 64Msg-buffer x 1 | - | - | - | 32 x 4 | 6 | - | 1 | - | - | RAM 8KB can be used as BackUpRAM Initial status of the clock supervisor is "Off" | On-chip Debug |
Related Documentation
Hardware
These support tools of CY parts will be stopped shipment and order in a few years.
These tools will be changed to CY parts in the future. But there may be no plan because of old tool.
| Name | Part number | Description | Remarks |
|---|---|---|---|
| Main unit | MB2100-01A-E / Details | Single wire On-chip Debugger Main unit Order P/N: MB2100-01A-E-SPN |
|
| Evaluation board | MB2198-760-E | Main board for MB91520/MB91570/MB96600 Order P/N: MB2198-760-E-SPN |
Option |
| MB2198-769-064-E | Sub evaluation board MB91F579 is mounted (LQFP-144, 0.5mm pitch) |
||
| MB2198-769-074-E | Sub evaluation board MB91F579 is mounted (LQFP-176) |
Software
| Software | Part number |
|---|---|
| SOFTUNE V6 Professional Pack Details |
SP365030118QAC |
CPU Information file: Supported
Sample I/O register file: Supported
CY91F577
| Oscillator manufacturer | Frequency | Products | C1 [pF] | C2 [pF] | Rd [ohm] |
| KYOCERA Co. | 4MHz | CX1255GA | 8 | 8 | 0 |
| KYOCERA Co. | 4MHz | CX8045GA | 8 | 8 | 0 |
| KYOCERA Co. | 4MHz | CX8045JA | 8 | 8 | 0 |
| Murata Manufacturing Co. | 4MHz | CSTCR4M00G15C**-R0 | 39 | 39 | 0 |
| Murata Manufacturing Co. | 4MHz | CSTCR4M00G55B4T-R0 | 39 | 39 | 0 |
Note: The recommendation circuit constant of oscillation evaluation result is reference value by oscillator maker measurement environment.
It is not guaranteed value. Get consult with oscillator supplier for physical layout and circuit parameters for each design.
The Sample Programs ("Programs") are offered for use in developing systems for Cypress microcontrollers.
The Programs will be useful in the following situations:
- I need a simple sample program, as I am going to develop software. The sequence of resource access, among others, can be confirmed using these Programs.
- I would like to examine, before development, whether each resource will operate as expected. The Programs support several specifications, even for the operation of one resource.
- If resources do not operate properly on my system, I would like software for which confirmation of operation has been completed. Cypress has confirmed the actual operation of the Programs on each of its microcontrollers, so you will be able to compare your program with the Program.
We introduce the sample programs of FR81S Family. Please use it for the confirmation of the operation specification and the use of our microcontroller etc.
| CY91570 series.zip |