CY8C5667AXI-LP040 | Cypress Semiconductor
CY8C5667AXI-LP040
| Development Kit | CY8CKIT-050 |
| Automotive Qualified | N |
| Boost Converter (Volts) | 0.5 |
| CPU Core | ARM Cortex-M3 |
| CapSense | Y |
| Dedicated ADC (#_ Max Resolution @ Sample Rate) | SAR (2, 12-bit @ 1000 ksps) |
| Dedicated DAC (#_ Max Resolution @ Sample Rate) | (4, 8-bit @ 8 msps) |
| EEPROM (KB) | 2 |
| Flash (KB) | 128 |
| LCD Direct Drive (Yes/No) | Y |
| Max. Operating Frequency (MHz) | 67 |
| Max. Operating Temp. (°C) | 85 |
| Max. Operating Voltage (V) | 5.50 |
| Min. Operating Temp. (°C) | -40 |
| Min. Operating Voltage (V) | 1.71 |
| No. of CAN Controllers | 0 |
| No. of DMA Channels | 24 |
| No. of Dedicated Comparators | 4 |
| No. of Dedicated Digital Filter Blocks | 1 |
| No. of Dedicated I2C | 1 |
| No. of Dedicated OpAmps | 4 |
| No. of Dedicated SPI | 0 |
| No. of Dedicated Timer/Counter/PWM Blocks | 4 |
| No. of Dedicated UART | 0 |
| No. of GPIOs | 62 |
| No. of Programmable Analog Blocks | 4 |
| No. of Programmable Universal Digital Blocks | 24 |
| No. of SIO | 8 |
| No. of USB IO | 2 |
| Part Family | PSoC 5LP |
| SRAM (KB) | 32 |
| Series | PSoC 5600 |
| Tape & Reel | N |
| USB (Type) | Full-Speed |
Pricing & Inventory Availability
| 1-9 unit Price* | 10-24 unit Price* | 25-99 unit Price* | 100-249 unit Price* | 250-999 unit Price* | 1000+ unit Price* |
|---|---|---|---|---|---|
| $8.82 | $8.45 | $8.08 | $7.71 | $7.34 | $6.73 |
Packaging/Ordering
Package
No. of Pins
100
Package Dimensions
551 L x 55 H x 551 W (Mils)
Package Weight
637.75 (mgs)
Package Cross Section Drawing
Package Carrier
TRAY
Package Carrier Drawing / Orientation
Standard Pack Quantity
90
Minimum Order Quantity (MOQ)
90
Order Increment
90
Estimated Lead Time (days)
140
HTS Code
8542.31.0001
ECCN
(A.3)
ECCN Suball
3A991.A.3
Quality and RoHS
Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
260 (Cypress Reflow Profile)
RoHS Compliant
PB Free
Y
Lead/Ball Finish
Ni/Pd/Au
Marking
IPC 1752 Material Declaration
Device Qualification Reports
FIT/MTBF, ESD (HBM/CDM) and Latch-up data available in the Device Qualification Report.
Last Update: Sep 16, 2016
Technical Documents
Application Notes (8)
May 29, 2020
Product Change Notice (PCN) (3)
May 06, 2020
Qualification of Fab 25 as an Additional Wafer Fab Site and Test 25 as an Additional Wafer Sort Site for PSoC® 5 LP Product Family
Oct 25, 2017
Qualification of Copper Palladium Wire Bonds for Select Lead Frame Products at JCET China
Product Information Notice (PIN) (5)
Apr 14, 2020
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization
Nov 06, 2017
GSMC Merger with HH-NEC to Form HHGrace Semiconductor Manufacturing Corporation
Nov 06, 2017
Improvement of Cypress Minnesota Back-End-of-Line Integration for 130nm SONOS Product Families