CY8C4245LQI-483 | Cypress Semiconductor
CY8C4245LQI-483
Automotive Qualified | N |
CPU Core | ARM Cortex-M0 |
CapSense | Y |
Dedicated ADC (#Max Resolution @ Sample Rate) | SAR (1, 12-bit @ 1 msps) |
EEPROM (KB) | 0 |
Flash (KB) | 32 |
JTAG and Si ID | 0x04B61193 |
LCD Direct Drive | Y |
Max. Operating Frequency (MHz) | 48 |
Max. Operating Temp. (°C) | 85 |
Max. Operating Voltage (V) | 5.50 |
Min. Operating Temp. (°C) | -40 |
Min. Operating Voltage (V) | 1.71 |
No. of CAN Controllers | 0 |
No. of Continuous Time Blocks | 2 |
No. of DMA Channels | 0 |
No. of Dedicated Comparators | 2 |
No. of Dedicated Timer/Counter/PWM Blocks | 4 |
No. of GPIOs | 34 |
No. of Op Amps | 2 |
No. of SIO | 0 |
No. of Serial Communication Blocks | 2 |
No. of USB IO | 0 |
No. of Universal Analog Blocks | 0 |
No. of Universal Digital Blocks | 4 |
PLL | N |
SRAM (KB) | 4 |
Series | PSoC 4200 |
Series | PSoC 4200 |
Tape & Reel | N |
USB (Type) | None |
Pricing & Inventory Availability
1-9 unit Price* | 10-24 unit Price* | 25-99 unit Price* | 100-249 unit Price* | 250-999 unit Price* | 1000+ unit Price* |
---|---|---|---|---|---|
$2.49 | $2.38 | $2.28 | $2.18 | $2.07 | $1.90 |
Packaging/Ordering
No. of Pins
40
Package Cross Section Drawing
Package Carrier
TRAY
Package Carrier Drawing / Orientation
Standard Pack Quantity
4900
Minimum Order Quantity (MOQ)
490
Order Increment
490
Estimated Lead Time (days)
182
HTS Code
8542.31.0001
ECCN Suball
3A991.A.3
Quality and RoHS
Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
260 (Cypress Reflow Profile)
RoHS Compliant
PB Free
Y
Lead/Ball Finish
Pure Sn;Ni/Pd/Au
Marking
Technical Documents
Application Notes (17)
Jul 02, 2020
Jul 01, 2020
Product Change Notice (PCN) (3)
Apr 14, 2020
Qualification of Fab 25 with the Copper (Cu) BEOL Process and Test 25 as an Additional Wafer Sort Site for the PSoC® 4200 Product Family
Oct 12, 2017
Qualification of Cypress Fab 25 as an Additional Wafer Fab for MBR3 and PSoC 4000 Product Families
Advanced Product Change Notice (APCN) (5)
Product Information Notice (PIN) (5)
Apr 14, 2020
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization
Nov 06, 2017
Improvement of Cypress Minnesota Back-End-of-Line Integration for 130nm SONOS Product Families