CY8C4145PVI-PS431 | Cypress Semiconductor

CY8C4145PVI-PS431
Status: In Production

Datasheet

(pdf, 803.41 KB) RoHS PB Free
(pdf, 913.65 KB) RoHS PB Free
(pdf, 1003.19 KB) RoHS PB Free

CY8C4145PVI-PS431

Automotive QualifiedN
CPU CoreARM Cortex-M0+
CapSenseY
Dedicated ADC (#Max Resolution @ Sample Rate)SAR (1, 12-bit @ 1 msps)
EEPROM (KB)0
Flash (KB)32
LCD Direct DriveN
Max. Operating Frequency (MHz)48
Max. Operating Temp. (°C)85
Max. Operating Voltage (V)5.50
Min. Operating Temp. (°C)-40
Min. Operating Voltage (V)1.71
No. of CAN Controllers0
No. of Continuous Time Blocks2
No. of DMA Channels8
No. of Dedicated Comparators2
No. of Dedicated Timer/Counter/PWM Blocks8
No. of GPIOs19
No. of Op Amps4
No. of SIO0
No. of Serial Communication Blocks3
No. of Smart I/Os8
No. of USB IO0
No. of Universal Analog Blocks0
No. of Universal Digital Blocks0
PLLN
SRAM (KB)4
Tape & ReelN
USB (Type)None

Pricing & Inventory Availability

1-9 unit Price* 10-24 unit Price* 25-99 unit Price* 100-249 unit Price* 250-999 unit Price* 1000+ unit Price*
$3.10 $2.97 $2.84 $2.71 $2.58 $2.37
Availability Quantity Ships In Buy from Cypress Buy from Distributors
Out of Stock 0 Please click here to check lead times

Packaging/Ordering

Package
SOP
No. of Pins
28
Package Dimensions
408 L x 0 H x 210 W (Mils)
Package Weight
229.90 (mgs)
Package Cross Section Drawing
Package Carrier
TUBE
Package Carrier Drawing / Orientation
Standard Pack Quantity
2350
Minimum Order Quantity (MOQ)
235
Order Increment
235
Estimated Lead Time (days)
112
HTS Code
8542.31.0001
ECCN Suball
3A991.A.3

Quality and RoHS

Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
RoHS Compliant
Y
PB Free
Y
Lead/Ball Finish
Ni/Pd/Au

Technical Documents

Application Notes (11)

Advanced Product Change Notice (APCN) (2)

Aug 23, 2020
Q32020 Horizon Report Update
Apr 22, 2020
Q220 Standard Horizon Report Update

Product Information Notice (PIN) (2)

Jun 10, 2020
Manufacturing Label and Packing Configuration Standardization
Apr 14, 2020
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization