CY14B256LA-SZ25XI | Cypress Semiconductor
CY14B256LA-SZ25XI
| Automotive Qualified | N |
| Density (Kb) | 256 |
| Frequency (MHz) | N/A |
| Interface | Parallel |
| Max. Operating Temp. (°C) | 85 |
| Max. Operating VCCQ (V) | 3.60 |
| Max. Operating Voltage (V) | 3.60 |
| Min. Operating Temp. (°C) | -40 |
| Min. Operating Voltage (V) | 2.70 |
| Organization (X x Y) | 32Kb x 8 |
| Part Family | Parallel nvSRAM |
| Speed (ns) | 25 |
| Tape & Reel | N |
| Temp. Classification | Industrial |
Pricing & Inventory Availability
| 1-9 unit Price* | 10-24 unit Price* | 25-99 unit Price* | 100-249 unit Price* | 250-999 unit Price* | 1000+ unit Price* |
|---|---|---|---|---|---|
| $21.19 | $18.79 | $17.65 | $16.52 | $15.60 | $14.58 |
| Availability | Quantity | Ships In | Buy from Cypress | Buy from Distributors |
|---|---|---|---|---|
| Out of Stock | 0 | Please click here to check lead times | Contact Sales | Buy |
Packaging/Ordering
Package
No. of Pins
32
Package Dimensions
816 L x 95 H x 300 W (Mils)
Package Weight
855.99 (mgs)
Package Cross Section Drawing
Package Carrier
TUBE
Package Carrier Drawing / Orientation
Standard Pack Quantity
330
Minimum Order Quantity (MOQ)
44
Order Increment
44
Estimated Lead Time (days)
70
HTS Code
8542.32.0041
ECCN
None
ECCN Suball
EAR99
Quality and RoHS
Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
260 (Cypress Reflow Profile)
RoHS Compliant
PB Free
Y
Lead/Ball Finish
Pure Sn
Marking
IPC 1752 Material Declaration
Technical Documents
Application Notes (10)
Feb 18, 2018
Product Change Notice (PCN) (5)
Apr 14, 2020
Qualification of Fab 25 as an Additional Wafer Fab Site and Test 25 as an Additional Wafer Sort Site for 3V/5V 1Mb Parallel nvSRAM Products
Oct 24, 2017
Qualification of Copper Wire Bonds for select Lead Frame Products at Amko Philippines andn Cypress Philippines and transfer of PDIP and PLCC parts from MMT to Amkor
Oct 11, 2017
Transfer of Assembly Site from Amkor Philippines to UTL Thailand for 32-Lead SOIC Product
Product Information Notice (PIN) (5)
May 07, 2020
Qualification of UTL as an additional finish site for 14-lead DFN and 32-lead SOIC packages
Apr 14, 2020
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization
Nov 06, 2017
Improvement of Cypress Minnesota Back-End-of-Line Integration for 130nm SONOS Product Families