CY14B104NA-ZSP25XI | Cypress Semiconductor

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CY14B104NA-ZSP25XI
Status: In Production

Datasheet

(pdf, 910.24 KB) RoHS PB Free

CY14B104NA-ZSP25XI

Automotive QualifiedN
Density (Kb)4096
Frequency (MHz)N/A
InterfaceParallel
Max. Operating Temp. (°C)85
Max. Operating VCCQ (V)3.60
Max. Operating Voltage (V)3.60
Min. Operating Temp. (°C)-40
Min. Operating Voltage (V)2.70
Organization (X x Y)256Kb x 16
Part FamilyParallel nvSRAM
Speed (ns)25
Tape & ReelN
Temp. ClassificationIndustrial

Pricing & Inventory Availability

1-9 unit Price* 10-24 unit Price* 25-99 unit Price* 100-249 unit Price* 250-999 unit Price* 1000+ unit Price*
$30.93 $27.44 $25.78 $24.11 $22.78 $21.29
Availability Quantity Ships In Buy from Cypress Buy from Distributors
Out of Stock 0 Please click here to check lead times

Packaging/Ordering

Package
SOP
No. of Pins
54
Package Dimensions
878 L x 1.2 H x 400 W (Mils)
Package Weight
580.02 (mgs)
Package Cross Section Drawing
Package Carrier
TRAY
Package Carrier Drawing / Orientation
Standard Pack Quantity
1080
Minimum Order Quantity (MOQ)
108
Order Increment
108
Estimated Lead Time (days)
91
HTS Code
8542.32.0041
ECCN
(B.2.A.)
ECCN Suball
3A991.B.2.A

Quality and RoHS

Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
PB Free
Y
Lead/Ball Finish
Pure Sn

Technical Documents

Application Notes (10)

Product Change Notice (PCN) (7)

May 10, 2020
Addendum 2 Change in Qualification of Copper Wire Bonds for 56SSOP Products at OSE-Taiwan
May 07, 2020
Qualification of ChipMOS as an Additional Assembly Site for Select 54-Lead TSOP II Products
May 06, 2020
Qualification of Cypress’ Fab 25 as an Additional Wafer Fab Site and Cypress’ Test 25 as an Additional Wafer Sort Site for the 4Mb Parallel nvSRAM Product Family
Apr 14, 2020
Qualification of Hwa Shu Shipping Tray for 54-Lead TSOP II Product Shipments at ASE Taiwan
Oct 31, 2017
Q2, 2012 - Q4, 2013 Horizon Report
Oct 30, 2017
Q1, 2012 - Q2, 2013 Horizon Report
Oct 24, 2017
Qualification of Copper Wire Bonds for select Lead Frame (LF) Products

Product Information Notice (PIN) (4)

Jun 10, 2020
Manufacturing Label and Packing Configuration Standardization
Apr 14, 2020
Addendum to PIN195102 - Manufacturing Label and Packing Configuration Standardization
Nov 06, 2017
Changes to Cypress Address Labels
Nov 06, 2017
Improvement of Cypress Minnesota Back-End-of-Line Integration for 130nm SONOS Product Families

Verilog (1)

Jul 26, 2010

VHDL (1)

IBIS (2)