Cypress Optimizes HOTLink II(TM) PHYs For OBSAI RP3 Serial Link Specification | Cypress Semiconductor
Cypress Optimizes HOTLink II(TM) PHYs For OBSAI RP3 Serial Link Specification
High-Speed Serial Links for Basestations Reduce Development Effort and Cost
SAN JOSE, Calif., October 19, 2004 - Cypress Semiconductor Corp. (NYSE: CY) today announced that its industry-leading HOTLink II(TM) physical layer (PHY) family meets the Reference Point 3 (RP3) specifications of the Open Basestation Architecture Initiative (OBSAI). OBSAI is anorganization ofleading basestation vendors and component manufacturers formed to create common basestation interface specifications. By standardizing high data-rate basestation architecture interfaces, manufacturers will be able to focus their development efforts on creating differentiation within the basestation, and thus be able to go to market more quickly with more cost-effective products.
The RP3 specification addresses the interface between baseband processing cards and RF modules utilizing OBSAI-defined packets and high-speed serial links. By following the RP3 specifications, 3G and future basestations can increase data throughput while standardizing the interfaces for easy board design. Cypress has enhanced the HOTLink II PHY to run at both of the OBSAI RP3-defined serial data speeds.
"Cypress has provided the basestation market with physical-layers and multi-ported memories for many years, and obtaining OBSAI-compliance is the next step in supporting our customers' evolving architectures," said Erin Kettwig, product manager for Cypress's Data Communications Division. "By optimizing our HOTLink II family for the OBSAI RP3 Serial Link Specification, Cypress continues to provide maximum value to basestation vendors by addressing the entire physical-layer interface between baseband cards and RF modules, thereby saving development time and effort. This enables quicker time to market for our customers, allowing them to focus on differentiating their design."
Cypress is a long-time supplier of backplane PHY transceivers that enable the transport of data over high-speed serial links (optical fiber, balanced and unbalanced copper transmission lines, and board traces). The HOTLink II family of PHY devices support both defined RP3 serial data rates of 768 Mbaud and 1536 Mbaud on any channel within a single chip. The chips also include a multi-byte framer for more robust framing in CDMA, W-CDMA and GSM/EDGE applications, and support selectable Comma (K28.5) character framing options between both message groups and master frames. Cypress's HOTLink II devices all feature low jitter, 8B/10B ENDEC capabilities, and are available in single-, dual-, quad-, and independent-channel configurations.
Pricing and Availability:
The HOTLink II(TM) family of OBSAI-compliant physical layers is available now, priced as listed in the table below:
1 Transceiver Channel
2 Transceiver Channels
4 Transceiver Channels
4 Independent Transceiver Channels
Cypress Semiconductor Corporation (NYSE: CY) is Connecting From Last Mile to First Mile(TM) with high-performance solutions for personal, network access, enterprise, metro switch and core communications-system applications. Cypress Connects(TM) using wireless, wireline, digital and optical transmission standards, including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet and DWDM. Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions and reconfigurable mixed-signal arrays. More information about Cypress is accessible online at https://www.cypress.com.
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