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L3 SYSC and EIC sample project | Cypress Semiconductor

L3 SYSC and EIC sample project

Last Updated: 
Jun 21, 2016
Version: 
1

The project includes all basic MCU startup code and the FCR4 Low Level
Library (L3), containing several peripheral modules.
This SYSC sample application demonstrates entering PSS mode and wake-up
through EIC.
The application will configure the system controller for PSS STATE transition.
Two separate functions ('PreparePssProfile'and 'PrepareRunProfile') are
available for RUN and PSS profile configuration where power and clock domains
are selectable.
When pressing switch button , the system enters PSS. Pressing
again will wake up the system.

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