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L3 PSS SEEP SLEEP sample project | Cypress Semiconductor

L3 PSS SEEP SLEEP sample project

Last Updated: 
Jun 21, 2016
Version: 
1

The project includes all basic MCU startup code and the FCR4 Low Level
Library (L3), containing several peripheral modules.
The application will output some text on the Starterkit serial port (USB)
using USART0 on the MCU. The communication parameters are 115.2 kbit/sec, 8N1.
The user can input some data which will be send back as echo.

The application will configure the system controller for PSS STATE transition. Two seperate functions ('PreparePssProfile'and 'PrepareRunProfile') are
available for RUN and PSS profile configuration where power and clock domains are selectable.

After configuration of RUN/PSS profile the PSS state will be entered after
the key is pressed. There is no wake-up implemented, the sample is
intended for current measurements. The low power mode current consumption can be measured on JP15 (MCU_VDD).

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