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65W USB-PD/PPS reference design with EZ-PD™ PAG1S+PAG1P and CoolGaN™ | Cypress Semiconductor

65W USB-PD/PPS reference design with EZ-PD™ PAG1S+PAG1P and CoolGaN™

Last Updated: 
Jun 22, 2021

This 65 W USB-PD type-C PPS reference design features Infineon’s PAG1S and PAG1P controllers together with the Infineon’s high-voltage CoolGaN™ FET. The solution meets the global efficiency standards including DoE Level VI/ CoC Tier 2 and offers a low standby power. The solution is tested and passes the CE standard defined by CISPR32 Class B. It offers a high board power density of 22.16 W/in3. The solution is targeted for USB PD (including PPS), QC power adapters. It can also support adapters that require legacy charging including Apple charging, BC1.2, QC 3.0 and Samsung AFC. Together, PAG1S and PAG1P offer a low BOM cost, high performance PD/PPS/QC compliant solution.

65W USB-PD/PPS reference design with EZ-PD™ PAG1S+PAG1P and CoolGaN™

Reference design features:

  • Universal input voltage of 90Vac – 265Vac
  • Supports USB PD 3.0
  • Fixed PDO: 5V/3A, 9V/3A, 12V/3A, 15V/3A, 20V/3.25A
  • PPS: 3.3V-21V/3.25A
  • Board dimension of 52x42x22 mm3
  • Passes CoC Tier 2 and DoE Level VI Efficiency standards
  • Passes CISPR 32 Class B CE standard
  • Low BOM cost with a simple primary start-up controller (PAG1P) and an integrated SR+PD controller (PAG1S)

The board hardware design files (schematic, layout etc) and firmware are readily available below for customers to reduce the design cycle.