33W USB-C Power Adapter Reference Design using PAG1S and PAG1P (PAG1 Solution) | Cypress Semiconductor
33W USB-C Power Adapter Reference Design using PAG1S and PAG1P (PAG1 Solution)
The 33W Power Adapter Reference Design Board is built using Cypress’ (Now an Infineon Company) PAG1S and PAG1P controllers. The solution meets the global efficiency standards including DoE Level VI/ CoC Tier 2 and the CE standard defined by CISPR32 Class B. The solution is targeted for USB PD (including PPS), QC power adapters. It can also supports adapters that require legacy charging including Apple charging, BC1.2, QC 3.0 and Samsung AFC. Together, PAG1S and PAG1P offer a low BOM cost, high performance PD/PPS/QC compliant solution.
Reference design features:
- Supports USB PD 3.0
- Fixed PDO: 5V/3A, 9V/3A
- PPS: 3.3V-11V/3A
- Passes CoC Tier 2 and DoE Level VI Efficiency standards
- Passes CISPR 32 Class B CE standard
- Low BOM cost with a simple primary start-up controller (PAG1P) and an integrated SR+PD controller (PAG1S)
The board hardware design files (schematic, layout etc) and firmware are readily available below for customers to reduce the design cycle.