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CYRS1543AV18, CYRS1545AV18: 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology | Cypress Semiconductor

CYRS1543AV18, CYRS1545AV18: 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology

Last Updated: 
May 28, 2020
Version: 
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72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology

Features

  • Separate independent read and write data ports
    • Supports concurrent transactions
  • 250 MHz clock for high bandwidth
  • Four-word burst for reducing address bus frequency
  • Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz)
  • Two input clocks (K and K) for precise DDR timing
    • SRAM uses rising edges only
  • Echo clocks (CQ and CQ) simplify data capture in high speed systems
  • Single multiplexed address input bus latches address inputs for read and write ports
  • Separate port selects for depth expansion
  • For more, see pdf

Functional Description

The CYRS1543AV18 and CYRS1545AV18 are synchronous pipelined SRAMs, equipped with 1.8 V QDR II+ architecture with RadStop™ technology. Cypress’s state-of-the-art RadStop Technology is radiation hardened through proprietary design and process hardening techniques.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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