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CYDXXS72V18, CYDXXS36V18, CYDXXS18V18: FullFlex™ Synchronous SDR Dual Port SRAM | Cypress Semiconductor

CYDXXS72V18, CYDXXS36V18, CYDXXS18V18: FullFlex™ Synchronous SDR Dual Port SRAM

Last Updated: 
Mar 04, 2019
Version: 
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FullFlex™ Synchronous SDR Dual Port SRAM

Features

  • True dual port memory enables simultaneous access to the shared array from each port
  • Synchronous pipelined operation with single data rate (SDR) operation on each port
    • SDR interface at 200 MHz
    • Up to 28.8 Gb/s bandwidth (200 MHz × 72-bit × 2 ports)
  • Selectable pipelined or flow-through mode
  • 1.5 V or 1.8 V core power supply
  • Commercial and Industrial temperature
  • IEEE 1149.1 JTAG boundary scan
  • Available in 484-ball PBGA (× 72) and 256-ball FBGA (× 36 and × 18) packages
  • For more, see pdf

     

Functional Description

The FullFlex™ dual port SRAM families consist of 2-Mbit, 9-Mbit, 18-Mbit, and 36-Mbit synchronous, true dual port static RAMs that are high speed, low power 1.8 V or 1.5 V CMOS. Two ports are provided, enabling simultaneous access to the array. Simultaneous access to a location triggers deterministic access control. For FullFlex72 these ports operate independently with 72-bit bus widths and each port is independently configured for two pipelined stages. Each port is also configured to operate in pipelined or flow through mode.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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