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CY7C4121KV13, CY7C4141KV13: 144-Mbit QDR™-IV HP SRAM | Cypress Semiconductor

CY7C4121KV13, CY7C4141KV13: 144-Mbit QDR™-IV HP SRAM

Last Updated: 
Aug 15, 2017

144-Mbit QDR™-IV HP SRAM


  • 144-Mbit density (8 M × 18, 4 M × 36)
  • Total Random Transaction Rate of 1334 MT/s
  • Maximum operating frequency of 667 MHz
  • Read latency of 5.0 clock cycles and write latency of 3.0 clock cycles
  • Two-word burst on all accesses
  • Dual independent bidirectional data ports
  • Single address port used to control both data ports
  • Single data rate (SDR) control signaling
  • For more, see pdf

Functional Description

The QDR-IV HP (High-Performance) SRAM is a high-performance memory device that has been optimized to maximize the number of random transactions per second by the use of two independent bidirectional data ports.

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Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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