You are here

CY7C1441AV33: 36-Mbit (1 M x 36) Flow-Through SRAM | Cypress Semiconductor

CY7C1441AV33: 36-Mbit (1 M x 36) Flow-Through SRAM

Last Updated: 
Jun 09, 2020

36-Mbit (1 M x 36) Flow-Through SRAM


  • Supports 133-MHz bus operations
  • 1M x 36 common I/O
  • 3.3 V core power supply
  • 2.5 V or 3.3V I/O power supply
  • Fast clock-to-output times
    • 6.5 ns (133-MHz version)
  • Provide high-performance 2-1-1-1 access rate
  • User-selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
  • Separate processor and controller address strobes
  • For more, see pdf

Functional Description

The CY7C1441AV33 are 3.3 V, 1 M × 36 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).