CY7C1441AV25, CY7C1447AV25: 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM | Cypress Semiconductor
CY7C1441AV25, CY7C1447AV25: 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM
36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM
Features
- Supports 133 MHz bus operations
- 1 M × 36/512 K × 72 common I/O
- 2.5 V core power supply
- 2.5 V I/O power supply
- Fast clock-to-output times
- Provide high performance 2-1-1-1 access rate
- User selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
- Separate processor and controller address strobes
- Synchronous self timed write
- For more, see pdf
Functional Description
The CY7C1441AV25/CY7C1447AV25 are 2.5 V, 1 M × 36/512 K × 72 Synchronous Flow-Through SRAMs, designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access. All synchronous inputs are gated by registers controlled by a positive edge-triggered Clock Input (CLK).
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Related Files
| File Title | Language | Size | Last Updated |
|---|---|---|---|
 CY7C1441AV25, CY7C1447AV25: 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM Datasheet.pdf |
English | 1.88 MB | 03/09/2016 |