You are here

CY26049-36: FailSafe™ PacketClock Global Communications Clock Generator | Cypress Semiconductor

CY26049-36: FailSafe™ PacketClock Global Communications Clock Generator

Last Updated: 
Jun 02, 2016

FailSafe™ PacketClock Global Communications Clock Generator


  • Fully Integrated Phase-Locked Loop (PLL)
  • FailSafe™ Output
  • 8 kHz Reference Clock
  • PLL Driven by a Crystal Oscillator that is Phase Aligned with External Reference
  • Selectable Standard Communication Output Frequencies
  • Low Jitter, High Accuracy Outputs
  • 3.3V Operation
  • 16-Pin TSSOP Package
  • Commercial and Industrial Temperature Ranges

Functional Description

CY26049 is a FailSafe frequency synthesizer with a reference clock input and three clock outputs. The device provides an optimum solution for applications which require continuous operation in case of primary clock failure. The continuous, glitch-free operation is achieved by using a DCXO which serves as a primary clock source.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.