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CY24272: Rambus® XDR™ Clock Generator with Zero SDA Hold Time | Cypress Semiconductor

CY24272: Rambus® XDR™ Clock Generator with Zero SDA Hold Time

Last Updated: 
Jun 24, 2016
Version: 
*D

Rambus® XDR™ Clock Generator with Zero SDA Hold Time

Features

  • Meets Rambus® Extended Data Rate (XDR™) clocking requirements
  • 25 ps typical cycle-to-cycle jitter
    • -135 dBc/Hz typical phase noise at 20 MHz offset
  • 100 or 133 MHz differential clock input
  • 300-667 MHz high speed clock support
  • Quad (open drain) differential output drivers
  • Supports frequency multipliers: 3, 4, 5, 6, 9/2 and 15/4
  • Spread Aware(™)
  • 2.5V operation
  • 28-pin TSSOP package

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.