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128 Mb HyperRAM Self-Refresh DRAM with HyperBus Interface | Cypress Semiconductor

128 Mb HyperRAM Self-Refresh DRAM with HyperBus Interface

Last Updated: 
Jun 08, 2020
Version: 
*A
The Cypress 128-Mb HyperRAM device is a high-speed CMOS, self-refresh DRAM, with HyperBus interface. The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the HyperBus interface master (host).