Universal Asynchronous Receiver Transmitter (UART) | Cypress Semiconductor

Universal Asynchronous Receiver Transmitter (UART)

Last Updated:

Mar 19, 2018

Version:

2.50

Features

9-bit address mode with hardware address detection
Baud rates from 110 to 921600 bps or arbitrary up to 4 Mbps
RX and TX buffers = 4 to 65535
Detection of Framing, Parity, and Overrun errors
Full Duplex, Half Duplex, TX only, and RX only optimized hardware
Two out of three voting per bit
Break signal generation and detection
8x or 16x oversampling

Symbol Diagram
UART Aiagram

General Description

The UART provides asynchronous communications commonly referred to as RS232 or RS485. The UART component can be configured for Full Duplex, Half Duplex, RX only, or TX only versions. All versions provide the same basic functionality. They differ only in the amount of resources used.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.

Related Files

File Title	Language	Size	Last Updated
Component - UART V2.50	English	908.36 KB	10/12/2017
Component - UART V1.50	English	596.25 KB	07/26/2016
Component - UART V2.30	English	1.1 MB	04/20/2016
Component - UART V2.40	English	761.97 KB	04/20/2016
Component - UART V2.20	English	520.41 KB	04/20/2016
Component - UART V2.10	English	1000.54 KB	04/20/2016
Component - UART V2.0	English	1.59 MB	04/20/2016
Component - UART V2.30 - Chinese	Chinese	1.46 MB	04/20/2016
Component - UART V2.10 - Chinese	Chinese	1.14 MB	04/20/2016
Component - UART V2.10 - Japanese	Japanese	1.52 MB	04/20/2016