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Serial Memory Interface (SMIF_PDL) | Cypress Semiconductor

Serial Memory Interface (SMIF_PDL)

Last Updated: 
Jun 27, 2018
Version: 
1.10
Features Symbol Diagram
  • Standard SPI Master interface
  • Supports Single/Dual/Quad/Octal SPI Memories
  • Supports Dual-Quad SPI mode
  • Design-time configurable support for multiple (up to 4) external serial memory devices
  • eXecute-In-Place (XIP) operation mode for both read and write accesses with 4KB XIP read cache and on-the-fly encryption and decryption
  • Supports external serial memory initialization via Serial Flash Discoverable Parameters (SFDP) standard
  • SMIF_PDL Component is a Hybrid Component
 

SMIF Diagram

 

General Description

The SMIF_PDL Component is a multifunction hardware block that implements the SPI communication to external serial memory devices, including the NOR Flash, SRAM, and non-volatile SRAM.

The SMIF_PDL Component is a hybrid graphical configuration entity with a set of Component-specific API built on top of the cy_smif driver available in the PDL. It allows schematic-based connections and hardware configuration as defined by the Component Configure dialog.