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Pulse-Density Modulation to Pulse-Code Modulation Decoder (PDM_PCM_PDL) | Cypress Semiconductor

Pulse-Density Modulation to Pulse-Code Modulation Decoder (PDM_PCM_PDL)

Last Updated: 
Mar 26, 2018
Features Symbol Diagram
  • Supports stereo/mono dual mode PDM to PCM conversion programmable word length
  • 1-bit PDM input, 16/18/20/24-bit PCM data output
  • Low digital microphone clock rates for low power applications
  • PCM sampling rate: from 8 KHz to 48 KHz
  • Volume control: programmable gain amplifier (PGA) from -12 dB to +10.5 dB in 1.5 dB steps
  • Hybrid Component (Peripheral Driver Library (PDL) and Component Application Programming Interface (API))

PDM PCM Diagram


General Description

The PDM_PCM_PDL Component converts a bit stream from a PDM source to PCM, which is similar to the output of an ADC. Various sample rates and data formatting options are supported.

The PDM_PCM_PDL Component is a graphical configuration entity built on top of the pdm_pcm driver available in the PDL. It allows schematic-based connections and hardware configuration as defined by the Component Configure dialog.

The generated configuration structures are to be passed into the pdm_pcm driver. The Component-specific API can also be used to access higher level functionalities built on top of the base driver.