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PSoC 4 Programmable Gain Amplifier (PGA_P4) | Cypress Semiconductor

PSoC 4 Programmable Gain Amplifier (PGA_P4)

Last Updated: 
Dec 13, 2018
Features Symbol Diagram
  • Eleven programmable gains between 1 and 32 in 3 dB steps
  • Gain and power levels may be changed during runtime
  • The internal feedback resistors saves up to two GPIOs
  • Buffer high impedance sensor signals
  • Amplify small signals to match ADC range
  • Ability to operate in deep sleep low power mode


General Description

The PGA_P4 implements an opamp-based, non-inverting amplifier with user-programmable gain. The amplifier has high input impedance, wide bandwidth, and selectable input voltage reference. The gain can be between 1 (0 dB) and 32 (+30 dB) and can be configured at build time or during run time in firmware.

Two output modes (Internal only and Output to pin) are provided to drive internal or external signals, respectively. The Output to pin mode may drive both an external pin and an internal block such as the SAR ADC. You also have control of different power levels that provide a tradeoff between power and bandwidth.