Clock Supervisor Functions (PDL_CSV) | Cypress Semiconductor
Clock Supervisor Functions (PDL_CSV)
The Clock Supervisor Component protects the application from clock failure situations and from oscillators that generate undesirable frequencies. CSV independently monitors both the main and sub clocks. If a rising edge of the monitored clock is not detected within the specified period, CSV determines that the oscillator has failed, and outputs a system reset request.
The anomalous frequency detection monitors frequency of the main clock by comparing it against the internal high speed CR clock (CLKHC), which cannot be faster than CLKMO. CSV counts main clock edges that occur between CLKHC edges and compares the result against a window range. If the count value reaches out of the set window range, the function determines that the main clock frequency is anomalous, and outputs either an interrupt request to the CPU or a system reset request.