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AN91206 - Designing with Cypress ONFI 1.0 nvSRAM | Cypress Semiconductor

AN91206 - Designing with Cypress ONFI 1.0 nvSRAM

Last Updated: 
May 30, 2020

AN91206 provides details of the Open NAND flash Interface 1.0 (ONFI Version 1.0) nvSRAM command structure, command cycles, address cycles, and data cycles. These details will help you design with Cypress’s ONFI 1.0 nvSRAM in a system. AN91206 also highlights the key differences between the ONFI 1.0 nvSRAM and ONFI 1.0-compliant NAND flash memory architecture, opcode, and functions to help you make necessary changes in the firmware program to allow you to access all features of the ONFI 1.0 nvSRAM using the standard ONFI 1.0 system bus.


The ONFI 1.0 nvSRAM follows the majority of the ONFI 1.0 standards which makes this device interoperable with all standard ONFI 1.0 host controllers. The ONFI 1.0 nvSRAM protocols are identical to the ONFI 1.0 standard, so can share the ONFI 1.0 bus with the other ONFI 1.0-compliant NAND flash devices in a system.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.