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AN70707 - EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and Schematic Checklist | Cypress Semiconductor

AN70707 - EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and Schematic Checklist

Last Updated: 
May 28, 2020

AN70707 discusses recommended practices for EZ-USB® FX3™/FX3S™ hardware design and the critical items that a developer must consider. The Cypress EZ-USB FX3 is the next generation USB 3.0 peripheral controller. With its highly integrated and flexible features, developers can add USB 3.0 functionality to any system. All recommendations apply to FX3 and FX3S, unless specifically mentioned otherwise.


Cypress’s EZ-USB® FX3™ is the next-generation USB 3.0 peripheral controller, providing integrated and flexible features. FX3 has a fully-configurable, parallel, general programmable interface called GPIF II, which can connect to any processor, ASIC, or FPGA. It provides easy and glueless connectivity to popular interfaces, such as asynchronous SRAM, asynchronous and synchronous address data multiplexed interfaces, and parallel ATA. FX3 has an embedded 32-bit Arm926EJ-S microprocessor for powerful data processing and for building custom applications. It implements an architecture that enables 375-MBps data transfer from GPIF II to the USB interface.

Please refer to the SuperSpeed Code Examples for more examples.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.