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AN69061 - Design, Manufacturing, and Handling Guidelines for Cypress Wafer Level Chip Scale Packages | Cypress Semiconductor

AN69061 - Design, Manufacturing, and Handling Guidelines for Cypress Wafer Level Chip Scale Packages

Last Updated: 
Apr 27, 2017
Version: 
*E
AN69061 provides guidelines for the design, manufacture, and handling of Cypress wafer level chip scale packages on flexible printed circuits and rigid printed circuit boards.

Introduction

This application note is for engineers who design and develop surface mount technology (SMT), printed circuit boards (PCB), or flexible printed circuits (FPC) for wafer level chip-scale package (WLCSP) devices.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.