AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs | Cypress Semiconductor
AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs
AN42468 discusses on-die termination (ODT) scheme, implementation, advantages and power calculation for the QDRII+ and DDRII+ family of Synchronous SRAMs on the 65-nm technology devices.
ODT has the following advantages:
- Improves signal integrity by having termination closer to the device inputs
- Simplifies board routing
- Saves board space by eliminating external resistors
- Reduces cost involved in using external termination resistors
For ODT-enabled QDRII+ and DDRII+ SRAMs, ODT is offered on the following input signals:
- Input clocks (K and Kb clocks)
- Data input signals
- Control signals (Byte Write Select signals)
The figure below shows the ODT implementation for Cypress QDRII+/DDRII+ SRAMs:
Clicking on the link below provides a tool which enables calculation of the Idd current for desired frequency, total Power consumption and Junction temperature for Sync SRAMs
https://www.cypress.com/?docID=23984
Please refer to the respective product datasheets to get the Vdd voltage and Idd current used in the formula.
Related Files
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English | 239.87 KB | 05/26/2020 |
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Chinese | 395.23 KB | 11/23/2015 |
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Japanese | 415.03 KB | 11/23/2015 |
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Related Resources
Active Current (IDD) Calculator | 09/23/2011 |