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AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs | Cypress Semiconductor

AN42468 - On-Die Termination for QDR(R) II+/DDR II+ SRAMs

Last Updated: 
Aug 02, 2017

AN42468 discusses on-die termination (ODT) scheme, implementation, advantages and power calculation for the QDRII+ and DDRII+ family of Synchronous SRAMs on the 65-nm technology devices.

ODT has the following advantages:

  • Improves signal integrity by having termination closer to the device inputs
  • Simplifies board routing
  • Saves board space by eliminating external resistors
  • Reduces cost involved in using external termination resistors

For ODT-enabled QDRII+ and DDRII+ SRAMs, ODT is offered on the following input signals:

  • Input clocks (K and Kb clocks)
  • Data input signals
  • Control signals (Byte Write Select signals)

The figure below shows the ODT implementation for Cypress QDRII+/DDRII+ SRAMs:


Clicking on the link below provides a tool which enables calculation of the Idd current for desired frequency, total Power consumption and Junction temperature for Sync SRAMs

Please refer to the respective product datasheets to get the Vdd voltage and  Idd current used in the formula.

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