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AN215656 - PSoC 6 MCU Dual-CPU System Design | Cypress Semiconductor

AN215656 - PSoC 6 MCU Dual-CPU System Design

Last Updated: 
Jan 26, 2021
Version: 
*H
AN215656 describes the dual-CPU architecture in PSoC 6 MCUs, which includes Arm® Cortex®-M4 and Cortex-M0+ CPUs, as well as an inter-processor communication (IPC) module. A dual-CPU architecture provides the flexibility to help improve system performance and efficiency, and reduce power consumption. The application note also shows how to build a simple dual-CPU design using Cypress' ModusToolbox™ software, Command-line Interface (CLI), and PSoC Creator IDE, and how to debug the design using various IDEs.

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Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.