AN1090 - NoBL™: The Fast SRAM Architecture | Cypress Semiconductor

AN1090 - NoBL™: The Fast SRAM Architecture

Last Updated:

Mar 03, 2021

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Processors in high-performance communication equipments and networking applications demand highspeed memories. The type of memory required is determined by the system architecture, the application, and the processor used. System performance suffers if the memory sub-system cannot satisfy the processor requirements.

This application note describes the Cypress NoBL SRAMs architecture designed to improve memory sub-system performance.

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Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

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Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.

Related Files

File Title	Language	Size	Last Updated
AN1090 NoBL The Fast SRAM Architecture.pdf	English	605.62 KB	02/28/2021
AN1090 NoBL The Fast SRAM Architecture (Chinese).pdf	Chinese	709.43 KB	08/20/2015
AN1090 NoBL The Fast SRAM Architecture (Japanese).pdf	Japanese	794.53 KB	08/20/2015

Related Resources

Datasheets
CY7C1470V33, CY7C1472V33, CY7C1474V33: 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture	06/09/2020
CY7C1471V25: 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture	11/21/2016
CY7C1471V33: 72-Mbit (2 M × 36) Flow-through SRAM with NoBL™ Architecture	02/15/2018
CY7C1470V25, CY7C1472V25, CY7C1474V25: 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture	06/09/2020
CY7C1461AV33, CY7C1463AV33: 36-Mbit (1 M × 36/2 M × 18) Flow-Through SRAM with NoBL™ Architecture	06/09/2020
CY7C1351G: 4-Mbit (128 K × 36) Flow-through SRAM with NoBL™ Architecture	06/09/2020
CY7C1353G: 4-Mbit (256 K × 18) Flow-Through SRAM with NoBL™ Architecture	06/09/2020
CY7C1352G: 4-Mbit (256 K × 18) Pipelined SRAM with NoBL™ Architecture	11/21/2016
CY7C1350G: 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture	06/08/2020
CY7C1354CV25, CY7C1356CV25: 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM with NoBL™ Architecture	06/08/2020
CY7C1355C, CY7C1357C: 9-Mbit (256 K × 36 / 512 K × 18) Flow-Through SRAM with NoBL™ Architecture	06/08/2020
CY7C1354C, CY7C1356C: 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM with NoBL Architecture	04/09/2018
CY7C1470BV25, CY7C1472BV25: 72-Mbit (2 M × 36/4 M × 18) Pipelined SRAM with NoBL™ Architecture	02/15/2018
CY7C1470BV33, CY7C1472BV33, CY7C1474BV33: 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture	02/15/2018
CY7C1471BV25: 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL Architecture	05/19/2016
CY7C1471BV33, CY7C1473BV33: 72-Mbit (2 M × 36/4 M × 18) Flow-Through SRAM with NoBL™ Architecture	01/29/2018
CY7C1380DV33/CY7C1382DV33, 18-MBIT (512 K X 36/1 M X 18) PIPELINED SRAM	01/05/2016
CY7C1460BV25, CY7C1462BV25: 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture	01/06/2016
CY7C1371DV33: 18-Mbit (512 K × 36) Flow-Through SRAM with NoBL™ Architecture	03/11/2016
CY7C1463BV33: 36-Mbit (2 M × 18) Flow-Through SRAM with NoBL™ Architecture	01/11/2016
CY7C1354D: 9-Mbit (256 K × 36) Pipelined SRAM with NoBL™ Architecture	05/30/2020