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AN58069 - IMPLEMENTING AN 8-BIT PARALLEL MPEG2-TS INTERFACE USING SLAVE FIFO MODE IN FX2LP | Cypress Semiconductor

AN58069 - IMPLEMENTING AN 8-BIT PARALLEL MPEG2-TS INTERFACE USING SLAVE FIFO MODE IN FX2LP

Last Updated: 
May 28, 2020
Version: 
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This is an Obsolete Application Note
The document AN58069 - IMPLEMENTING AN 8-BIT PARALLEL MPEG2-TS INTERFACE USING SLAVE FIFO MODE IN FX2LP has been marked as obsolete. The obsolete version of this application note is still available with the below description but may not be complete or valid any longer. If you have any questions or require support in regards to the below application note content, please click here and create a technical support case.

This application note explains how to implement an 8-bit parallel MPEG2-TS interface using the Slave FIFO mode.

The example code uses EZ-USB FX2LP™ (CY7C68013/14/15/16) at the receiver end and a data generator as the source for the data stream. The hardware connections and example code are included with this application note. In addition, this application note describes a design example that uses this interface.

Introduction

The EZ-USB FX2LP is an excellent solution if you want to a high-performance high-speed USB to a design. In applications similar to a TV dongle, an MPEG2-TS to USB Bridge is critical. The EZ-USB FX2LP not only takes care of glueless logic, but also makes it easier for the designer to complete the design. This application note addresses the hardware connections and example firmware required to implement the MPEG2-TS interface using the Slave FIFO mode.