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PSoC 4200M WDT Long Deep Sleep | Cypress Semiconductor

PSoC 4200M WDT Long Deep Sleep

[re-printed from iotexpert.com]

Earlier this year I wrote an article about using the PSoC 4200M WDT Watch Dog Timers.  In it I described a bunch of things that you could do with the PSoC 4200M WDT to help you time events, reset the part etc.  Recently a user named JAGIR asked if I could generate interrupts slower than 2 seconds and have the PSoC 4200M in deep sleep.  The answer to both of those questions is yes.

In order to make this work you need to “cascade” two WDTs together, something you can only do with firmware.  I have updated my previous workspace with a new project called “LongDeepSleep” which you can “Git” on my GitHub website or you can “git@github.com:iotexpert/PSoC4-WDTExamples.git”

Configure the PSoC 4200M WDT Design

First add a digital output pin called “RED” to the schematic

PSoC 4200M WDT Schematic

Then assign it to P0[6]

PSoC 4200M WDT - DWR Pin Assignment

Go to the clocks tab of the design wide resources.  Then click on “Edit Clock”.

PSoC 4200M WDT Clocks

On the Low Frequency Clocks configuration page of the design wide resources turn on the two WDTs and setup the dividers.

PSoC 4200M WDT

System Reference Guide – PSoC 4200M WDT

All of the documentation for the PSoC 4200M WDT is in the “Low Frequency Clock aka cy_lfclk” of the system resources documentations.

PSoC 4200M WDT System Reference Guide

When you read a little bit down in the PSoC 4 Low Frequency clock documentation you will find “Note The EDT cascade options are not configurable using these panels but the APIs can be used to perform cascading of WDTs”

PSoC 4200M WDT

Then you search a little bit further down in the document and you will find the API CySysWDTSetCascade which will allow you to hook multiple 16-bit counters together to get 32 or more bits.

PSoC 4200M WDT - CySysWdtSetCascade

Write the PSoC 4200M WDT Firmware

The first example will blink the LED every 4 seconds.  Remember from the configuration above it has a 32KHz input clock with a divider of 1024 on WDT0 and a divider of 128 on WDT1.  That means you will get 32KHz / (1024 *128) = 0.25 Hz aka every 4 seconds.

#include "project.h"

 

void wdtCallback()

{

    RED_Write(~RED_Read());

    

}

 

int main(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

    CySysWdtSetInterruptCallback(CY_SYS_WDT_COUNTER1,wdtCallback);

    CySysWdtSetCascade(CY_SYS_WDT_CASCADE_01);

    

    for(;;)

    {

        CySysPmDeepSleep();

    }

}

You can also get different delays by changing the dividers using firmware.  In the example below it is 1Hz output.

#include "project.h"

 

void wdtCallback()

{

    RED_Write(~RED_Read());

}

 

int main(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

    CySysWdtSetInterruptCallback(CY_SYS_WDT_COUNTER1,wdtCallback);

    CySysWdtSetCascade(CY_SYS_WDT_CASCADE_01);

    

    CySysWdtSetMatch(0,512);

    CySysWdtSetMatch(1,64);

    // Total divide = 512*64 = 32768

    

    for(;;)

    {

        CySysPmDeepSleep();

    }

}

 

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Comments

algernonfan_3132121's picture

How to get different delays?  I've tried changing the dividers like mentioned in the example, but nothing worked. Perhaps, that's something similar to Gitbub experiments. Several days ago, I've found the pdf file with all the changes saved (some part of the Educational Center of PSoC Creator archived). And later, contacted their service.

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evavosper_3224426's picture

Good day. Agreeable Information and very helpful for my Dissertation Help UK site! I have an interrogation on whether it is possible to do a watch dog timer reset every 30 minutes. If yes, how do I go about changing your code?

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