Project #027: Bluetooth Low Energy Power Consumption Optimization | Cypress Semiconductor
Project #027: Bluetooth Low Energy Power Consumption Optimization
In today s project, we will learn how to optimize a PSoC 4 BLE design for lowest power consumption.
It is no secret that modern day electronics, especially products for the IoT, have increasing dependencies on battery packs. Due to the portable and untethered nature of these products, battery life and power consumption have become very critical metrics when choosing the right embedded solution.
A common method employed by MCUs and Radios to improve battery life is to offer low-power modes, during which the chip offers restricted performance or features, with the benefit of much lower power consumption while in those modes. This is great for IoT products that typically spend more time in these low-power or standby modes than in the full-power actives modes itself. For example, a fitness monitor could take heart rate measurements several times during a day, but that may only account to 60-mins of total active time over a 24-hour period.
PSoC 4 BLE shines in this regard by offering not just one, but five flexible low-power modes enabling you, the designer, with all the right tools to optimize your design for the lowest possible power consumption. The chip features low-power modes for both the CPU and peripherals in the system, but also independently for the Bluetooth Low Energy radio block. See the image below for more details on the low-power modes available on PSoC 4 BLE and the various peripherals that are available during each of those modes. In its Deep-Sleep mode, the CPU only consumes 1.3-µA while keeping the Bluetooth Low Energy Link-Layer active. This means that you do not have to disconnect from an active Bluetooth Low Energy connection when switching to the Deep-Sleep mode and can quickly switch back to the Active mode for short time intervals to process the Bluetooth Low Energy Stack and to transmit and receive data over the Radio. There are two modes that offer even lower power consumption the 150-nA Hibernate mode where a few analog peripherals are still available, and the 60-nA Stop mode for minimal current leakage when the device is on complete standby. You can learn more about PSoC s low-power modes in this application note: AN92584 Designing for Low Power and Estimating Battery Life for BLE Applications.
In this example, we implement basic power reduction technique by using these low-power modes. This project also acts as a good template project that you can use to measure real-time power consumption as you switch between the various low-power modes on the chip. The BLE Pioneer Kit has a dedicated power measurement jumper (J15) to which you can hook-up a digital multimeter or a pico-ammeter to measure the extremely low nA currents.
You can download this PSoC Creator project along with a detailed PDF of instructions, here from GitHub: https://github.com/cypresssemiconductorco/PSoC-4-BLE/tree/master/100_Projects_in_100_Days/Day027_BLE_Power_Measurement