Cypress Synchronous SRAM
Cypress is the worldwide market leader in synchronous SRAM. Cypress offers a wide portfolio including standard synchronous SRAM, No Bus Latency™ SRAM, and QDR® SRAM with a variety of speeds, word widths, densities, and packages. As a top-tier manufacturer, Cypress complements its products with best-in-class manufacturing and customer support.
Memory for High-Performance SystemsHigh-performance systems, such as enterprise routers and switches, demand high random access memory performance. Cypress’s QDR® SRAM is optimized for high random access performance to enable next generation networks and other high-performance systems. |
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QDR ConsortiumThe QDR Consortium defines Quad Data Rate SRAM specifications. Participating companies develop pin- and function- compatible products ensuring multiple sources for customers. As a founding member, Cypress leads the definition of new standards in the QDR Consortium. |
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Random Transaction Rate (RTR)
Random Transaction Rate (RTR) is the number of fully random read or write transactions a memory can perform every second. It is measured in MT/s, or million transactions per second. RTR is a critical metric in high performance applications, such as networking, where memory access is unpredictable.
The QDR AdvantageThe QDR SRAM architecture provides the random memory access capabilities needed for networking and other high performance applications. In these applications, memory is a major bottleneck to reaching higher system performance. For example, in networking applications, each data packet requires several random memory transactions. Therefore, the packet processing rate of the system is dependent on how quickly the system can access memory. Cypress’s QDR SRAM provides the RTR necessary to break system bottlenecks. Other memory technologies are optimized for high density and bandwidth. Although these memories perform well for compute applications as the main memory, they do not meet the needs of high performance applications that demand high RTR. QDR SRAM, on the other hand, is designed specifically for maximum RTR. QDR SRAM allows access to any two memory locations on every clock cycle, and performance never depends on which memory location was accessed in the previous clock cycle. With QDR SRAM, RTR is guaranteed. Today, Cypress’s QDR-II+ Xtreme provides RTR up to 900 MT/s. To enable the next generation of high-performance systems, Cypress is currently developing two completely new QDR SRAM products that will push RTR higher than ever before. |
![]() Cypress QDR SRAM provides fully random memory access |
Feature Summary
Cypress Synchronous SRAM provides the true random memory access capabilities needed for networking and other high performance applications. In addition, Cypress Synchronous SRAM is available with a number of features that are engineered to solve networking and high performance computing challenges.| QDR-II+ Xtreme DDR-II+ Xtreme |
QDR-II+ DDR-II+ |
QDR-II DDR-II |
NoBL | Standard Sync | |
| Dual Independent Data Ports | ![]() |
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| Quad Data Rate (QDR) | ![]() |
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| On-Die Termination (ODT) | ![]() |
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| Lead-Free | ![]() |
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Dual Independent Data Ports
QDR SRAM is equipped with dual independent data ports to maximize memory access rates. The two ports operate concurrently, enabling both a read and write operation to occur during the same clock cycle. Access to each port is provided through a common address bus. Addresses for each port are latched on alternate rising edges of the input clock. One port is dedicated to read operations and the other is dedicated to write operations.![]() |
Quad Data Rate (QDR)The data ports on QDR SRAM have double data rate (DDR) interfaces that perform two transfers per clock cycle. With two DDR data ports, QDR SRAM performs four transfers per clock cycle. |
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On-Die Termination (ODT)On-Die Termination improves signal integrity, saves board space, and reduces cost compared to external termination resistors. In high speed systems without proper signal termination, electrical signals are reflected when they reach the end of a transmission path, producing noise that lowers signal quality and reduces performance. These reflections can be reduced by attaching a resistor to the end of the transmission line. However, adding external resistors consumes board space, complicates board routing, and increases cost. ODT addresses these challenges by embedding the termination resistors within the SRAM die, which provides proper signal termination and enables high speed signaling without adding external components. |
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Lead-FreeCypress SRAM products are available in lead-free packages. |
Synchronous SRAM portfolio
Cypress offers the broadest portfolio of synchronous SRAM products, including QDR, NoBL™, and standard pipelined and flow-through products. Cypress complements its products with long term support and continues to expand the portfolio to meet customer requirements.| Family | Speed (max) | RTR (max) | Density | |
| QDR-II+ Xtreme DDR-II+ Xtreme |
633 MHz | 900 MT/s | 36-72 Mb | Learn More Product Selector |
| QDR-II+ DDR-II+ |
550 MHz | 667 MT/s | 18-144 Mb | Learn More Product Selector |
| QDR-II DDR-II |
333 MHz | 667 MT/s | 18-144 Mb | Learn More Product Selector |
| NoBL | 250 MHz | 250 MT/s | 4-72 Mb | Learn More Product Selector |
| Standard Sync | 250 MHz | N/A | 2-72 Mb | Learn More Product Selector |
NoBL = No Bus Latency
RTR = Random Transaction Rate
MT/s = Million Transactions per Second








