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Traveo S6J326Cx 3D/2D Graphic Control+Single HyperBus ARM® Cortex®-R5 MCU | Cypress Semiconductor

Traveo S6J326Cx 3D/2D Graphic Control+Single HyperBus ARM® Cortex®-R5 MCU

The Cypress® Traveo MCU family S6J3200 features 32-bit RISC microcontrollers with an ARM® Cortex®- R5 core and operates at 240MHz. This microcontroller comes with highly-efficient 2D/3D graphic engines with advanced feature-sets for memory savings, safety and high image quality to help manufacturers take advantage of the lower overall system costs while meeting the increasingly high levels of performance and quality that industrial, consumer and automotive applications demand. In addition, this microcontroller offers support for Cypress HyperBusTM memory interface, a breakthrough that dramatically improves read performance while reducing the number of pins.

This microcontroller comes with Ethernet AVB, CAN-FD, a high-speed communication protocol compatible with the conventional CAN, and SHE(Secure Hardware Extension) as security function.

Block Diagram

Traveo S6J326CxS Block Diagram

Product Name Maximum Internal Clock [MHz] Floating Point Unit Memory Protection Unit Package [pin] Operating Voltage: VCC [V] Sub Clock ROM [Byte] RAM [Byte] Cache [KByte] DMAC [ch] Ext. Interrupt [ch] External Bus I/F Max. I/O port [ch] 12-bit ADC [ch x unit] Output Compare [ch] Free-Run Timer [ch] Input Capture [ch] Reload Timer, PWM Timer, PWC Timer, PPG Timer / Base Timer (Reload/PPG/PWM/PWC Selectable) [ch] Up/Down Counter [ch] Other timers [ch] I2C, UART/SI, SIO, Multi Function Serial - MFS (MFS: LIN/UART/SIO/I2C Selectable) [ch] CAN [ch] MediaLB Ethernet AVB LCD Controller Driver
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Stepper Motor Controller Driver [ch] Graphic Display Controller Display Output [ch] FPD Link (LVDS) [ch] Sound Generator High-Quality Sound System Secure Hardware Extention (Optional) Remarks Evaluation Method / Device
S6J325CK 240 Yes Yes TEQFP-208 1.1 to 1.3,
3.0 to 3.6,
4.5 to 5.5
Yes 2112K + 112K TC- RAM: 128K, System- RAM: 128K
Backup- RAM: 16K, VRAM: 2048K
Instruction: 16
Data: 16
16 16 120 46 x 1 24 12 24 Reload Timer x 14, 16bit Base Timer x 24 2 * RTC x 1 MFS x 12 (Not all port support I2C) CANFD 128Msg-buffer x 4 Yes Yes 30 x 4 6 2D and 3D 2 - 4 - Yes ARM Cortex-R5F
Quad-SPI x 2-ch x 2 unit, HyperBus (Ch.0, 1),
* QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J325CL 240 Yes Yes TEQFP-216
(0.4mm pitch)
1.1 to 1.3,
3.0 to 3.6,
4.5 to 5.5
Yes 2112K + 112K TC- RAM: 128K, System- RAM: 128K
Backup- RAM: 16K, VRAM: 2048K
Instruction: 16
Data: 16
16 16 128 50 x 1 24 12 24 Reload Timer x 14, 16bit Base Timer x 24 2 * RTC x 1 MFS x 12 (Not all port support I2C) CANFD 128Msg-buffer x 4 Yes Yes 32 x 4 6 2D and 3D 2 - 4 - Yes ARM Cortex-R5F
Quad-SPI x 2-ch x 2 unit, HyperBus (Ch.0, 1),
* QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J326CK 240 Yes Yes TEQFP-208 1.1 to 1.3,
3.0 to 3.6,
4.5 to 5.5
Yes 2112K + 112K TC- RAM: 128K, System- RAM: 128K
Backup- RAM: 16K, VRAM: 2048K
Instruction: 16
Data: 16
16 16 120 46 x 1 24 12 24 Reload Timer x 14, 16bit Base Timer x 24 2 * RTC x 1 MFS x 12 (Not all port support I2C) CANFD 128Msg-buffer x 4 Yes Yes 30 x 4 6 2D and 3D 2 1 4 Yes Yes ARM Cortex-R5F
Quad-SPI x 2-ch x 2 unit, HyperBus (Ch.0, 1),
* QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J326CL 240 Yes Yes TEQFP-216
(0.4mm pitch)
1.1 to 1.3,
3.0 to 3.6,
4.5 to 5.5
Yes 2112K + 112K TC- RAM: 128K, System- RAM: 128K
Backup- RAM: 16K, VRAM: 2048K
Instruction: 16
Data: 16
16 16 128 50 x 1 24 12 24 Reload Timer x 14, 16bit Base Timer x 24 2 * RTC x 1 MFS x 12 (Not all port support I2C) CANFD 128Msg-buffer x 4 Yes Yes 32 x 4 6 2D and 3D 2 1 4 Yes Yes ARM Cortex-R5F
Quad-SPI x 2-ch x 2 unit, HyperBus (Ch.0, 1),
* QRPC x 2 (= Up/Down Counter)
On-chip Debugger