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Traveo S6J312A/9/8 Classic Cluster ARM® Cortex®-R5 MCU | Cypress Semiconductor

Traveo S6J312A/9/8 Classic Cluster ARM® Cortex®-R5 MCU

The Cypress Traveo S6J3120 series features a single ARM® Cortex™-R5 operates at 128 MHz with 1MB embedded flash memory. The S6J3120 series incorporates the high-performance 5 Mbps CAN FD interface for latest in-vehicle network requirement.

In addition to the CAN FD interface, the S6J3120 series comes with segment LCDC and Stepper Motor Controller/Driver for up to four mechanical gauge indicators for an instrument clusters.

It also features Secure Hardware Extension (SHE) for in-vehicle network security and for a connected applications, as well as Partial Wakeup mode for advanced power saving operation.

Block Diagram

Product Name Maximum Internal Clock [MHz] Floating Point Unit Memory Protection Unit Package [pin] Operating Voltage: VCC [V] Sub Clock ROM [Byte] RAM [Byte] Cache [KByte] DMAC [ch] Ext. Interrupt [ch] External Bus I/F Max. I/O port [ch] 12-bit ADC [ch x unit] Output Compare [ch] Free-Run Timer [ch] Input Capture [ch] Reload Timer, PWM Timer, PWC Timer, PPG Timer / Base Timer (Reload/PPG/PWM/PWC Selectable) [ch] Up/Down Counter [ch] Other timers [ch] I2C, UART/SI, SIO, Multi Function Serial - MFS (MFS: LIN/UART/SIO/I2C Selectable) [ch] CAN [ch] MediaLB Ethernet AVB LCD Controller Driver
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Stepper Motor Controller Driver [ch] Graphic Display Controller Display Output [ch] FPD Link (LVDS) [ch] Sound Generator High-Quality Sound System Secure Hardware Extention (Optional) Remarks Evaluation Method / Device
S6J3128 128 - Yes TEQFP-144 4.5 to 5.5 576K + 112K TC- RAM: 32K, System- RAM: 16K,
Backup- RAM: 8K
Instruction: 16
Data: 16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 Yes ARM Cortex-R5
Quad-SPI x 1-ch, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J3129 128 - Yes TEQFP-144 4.5 to 5.5 832K + 112K TC- RAM: 48K, System- RAM: 16K,
Backup- RAM: 8K
Instruction: 16
Data: 16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 Yes ARM Cortex-R5
Quad-SPI x 1-ch, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J312A 128 - Yes TEQFP-144 4.5 to 5.5 1088K + 112K TC- RAM: 64K, System- RAM: 16K,
Backup- RAM: 8K
Instruction: 16
Data: 16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 Yes ARM Cortex-R5
Quad-SPI x 1-ch, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger