The PSoC® architecture consists of programmable analog and digital blocks, a CPU subsystem and programmable routing and interconnect. PSoC lets you plug in predefined and tested IP from the PSoC library of functions (called PSoC Components), or code your own. Either way, you have the flexibility to build innovative and competitive features into your products.
Programmable Routing & Interconnect
This frees you to re-route signals to user selectable pins, shedding the constraints of a fixed-peripheral controller. In addition, global buses allow for signal multiplexing and logic operations, eliminating the need for a complicated digital-logic gate design.
Programmable Analog Blocks
PSoC enables custom AFE designs and sophisticated UIs without increasing cost, size or power with programmable analog blocks including an assortment of switch capacitors, opamps, comparators, ADCs, DACs, PGAs, etc. allowing complex analog signal designs.
Programmable Digital Blocks
PSoC implements coprocessors and serial interfaces without increasing cost, size or power with programmable digital blocks such as Timers/Counters/PWMs, Serial Communication Blocks, and Universal Digital Blocks (UDBs). UDBs are PLD-based blocks that can be configured to perform various tasks.
PSoC offers a 32-bit ARM Cortex®-M based CPU subsystem with SRAM , EEPROM, and Flash memory. Mmultiple core options and a variety of essential system resources include:
- An internal main and low-speed oscillator
- Connectivity to external crystal oscillator for precision, programmable clocking
- Sleep and watchdog timers
- Multiple clock sources that include a PLL
- Dedicated communication interfaces like: I2C, Full-Speed USB 2.0, CAN 2.0 and Bluetooth Low Energy
- On-chip debugging capabilities using JTAG and Serial Wire Debug (SWD)