CYFL208-003 | Cypress Semiconductor


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Technical Documents

Application Notes (27)

Jul 12, 2018
This application note provides conversion guidelines to Cypress S29GL-P flash family devices from Numonyx Embedded Memory (J3) and Numonyx StrataFlash® Embedded Memory (P30) devices.
Jul 12, 2018
AN98487 describes the new features of the Cypress S29GL-S Flash device family and software considerations for migrating from the S29GL-N and S29GL-P families.
May 07, 2018
AN200621 describes the automatic Error Checking and Correcting (ECC) feature built into the S29GL-S and S29GL-T families of MirrorBit® nonvolatile flash memory devices.
May 07, 2018
AN98498 guides customers currently using the S29GL-N 110nm MirrorBit products to migrate to the S29GL-P 90nm MirrorBit products.
May 07, 2018
AN98500 highlights the S29GL-S Flash Read Page Mode architecture, operation, and an example Page Read Mode performance.
Apr 26, 2018
AN200973 discusses how to interface a Cypress flash device with the Texas Instruments OMAP3503 processor(OMAP3503/3515/3525/3530).
Jan 29, 2018
AN98586 outlines the differences and potential issues when migrating from the Cypress GL-N and GL-P to the GL-S flash family. It discusses affected device features, timing parameters as well as packages.
Sep 20, 2017
AN98565 discusses the best practices for using laser marking on devices to designate programming codes after the parts had been programmed for their specific applications.
Sep 19, 2017
AN201168 provides an overview of the changes implemented between versions 1.3 and 1.4 of the Cypress Flash memory Common Flash Interface (CFI) implementation.
Sep 10, 2017
AN201199 highlights the Flash Read Page Mode architecture and operation, and provides a comparison of Asynchronous and Page Read Mode performance.
Sep 10, 2017
AN98559 addresses two areas that are critical to enable the integration of 3.3-V flash into a system using a System Controller with 5-V I/O: the I/O signal requirements and the flash VCC power regulation requirements.
Sep 09, 2017
AN98579 details how to migrate designs from Macronix 128 Mbit MX29GL128E, 256 Mbit MX29GL256E, and 512 Mbit MX29GL512E flash memory devices to Cypress 128 Mbit 29GL128S, 256 Mbit S29GL256S, and 512 Mbit S29GL512S MirrorBit® flash memory devices, respectively.
Sep 09, 2017
AN99113 describes the software algorithm changes necessary to convert from a boot sectored flash device to a uniform sectored Flash device or vice versa.
Sep 09, 2017
AN99123 describes the considerations of reset control signal timing when using MirrorBit NOR flash devices in an application.
Aug 28, 2017
AN202453 outlines the differences and potential issues when migrating from the Cypress GL-P and GL-S to the GL-T flash family. It discusses affected device features, timing parameters as well as packages.
Aug 17, 2017
AN98562 highlights key i.MX6x processor / S29GL-S flash device features and outlines an example case illustrating the hardware and configuration consideration when interfacing an i.MX6x to the S29GL-S.
Aug 17, 2017
AN201317 provides a general routing guide for packages (substrate and/or lead frame) designed with S29GL-N, 32 Mb and 64 Mb, die.
Aug 16, 2017
AN201783 explores the benefits of moving to the new status register polling method instead of the data (DQ) polling method and discusses Cypress's low-level driver software, which can greatly reduce the developer's flash driver development time.
Aug 07, 2017
AN98584 describes how to convert a system design from Numonyx P33 to Cypress S29GL-P and S29GL-S.
Jul 24, 2017
AN98561 highlights the i.MX3x device features, like the WEIM for interfacing external memories like the S29GL NOR flash.
Jul 21, 2017
AN98594 details how to migrate designs from Numonyx™ 32 Mbit M29W320E and 64 Mbit M29W640G Flash Memory devices to Cypress® 32 Mbit S29GL032N and 64 Mbit S29GL064N MirrorBit® Flash Memory devices respectively. The S29GL032N and S29GL064N devices are 3.0 Volt-only Page Mode flash memory manufactured with 110 nm MirrorBit technology.
Jul 20, 2017
AN200452 describes the implementation of the Advanced Sector Protection in Cypress flash memory devices.
Jul 19, 2017
AN216200 discusses printed circuit board (PCB) layout recommendations to improve signal integrity and system performance when using Cypress non-burst-mode parallel NOR Flash memory.
Jul 09, 2017
AN98503 discusses the design considerations for signal integrity (SI) and power delivery network (PDN) that affect the robustness and performance of a system.
May 04, 2017
Common Flash Interface (CFI) is a standard introduced by the Joint Electron Device Engineering Council (JEDEC) to allow in-system or programmer reading of flash device characteristics, which is equivalent to having data sheet parameters located in the device. The JEDEC Solid State Technology Association defines industry standards for semiconductor devices, with CFI being one of the many. The CFI is used to standardize flash device characteristics and to define feature differences between various flash manufacturers. For a detailed definition of CFI, see the JEDEC CFI publications JEP137 and JESD68.
May 03, 2016
AN98550 describes the recommended flow of the end determination by the Erase Suspend/Resume function data polling at the time of use of GL-P.