CY8C27443-24SXI | Cypress Semiconductor

CY8C27443-24SXI

Status: In Production

CY8C27443-24SXI

Development KitCY3215-DK, CY3207-Pod
Boost Converter (V)0
CPU CoreM8C
CapSenseN
Dedicated ADC (No._ Max. Resolution @ Sample Rate)None
Dedicated DAC (No._ Max. Resolution @ Sample Rate)None
Flash (KB)16
LCD Direct DriveN
Max. Operating Frequency (MHz)24
Max. Operating Temp. (°C)85
Max. Operating Voltage (V)5.25
Min. Operating Temp. (°C)-40
Min. Operating Voltage (V)3.00
No. of Dedicated Comparators0
No. of Dedicated I2C1
No. of Dedicated OpAmps0
No. of Dedicated SPI2
No. of Dedicated UART2
No. of GPIOs24
No. of Programmable Analog Blocks12
No. of Programmable Digital Blocks8
SRAM (KB)0.25
USB (Type)None

Pricing & Inventory Availability

1-9 unit Price* 10-24 unit Price* 25-99 unit Price* 100-249 unit Price* 250-999 unit Price* 1000+ unit Price*
$3.99 $3.82 $3.65 $3.49 $3.32 $3.04
Availability Quantity Ships In Order Now
In Stock 250 24-48 hours

Packaging/Ordering

Package
No. of Pins
28
Package Dimensions
705 L x 0 H x 300 W (Mils)
Package Weight
830.75 (mgs)
Package Cross Section Drawing
Package Carrier
TUBE
Package Carrier Drawing / Orientation
Standard Pack Quantity
270
Minimum Order Quantity (MOQ)
270
Order Increment
270
Estimated Lead Time (days)
42
HTS Code
8542.31.0000
ECCN
None
ECCN Suball
EAR99

Quality and RoHS

Moisture Sensitivity Level (MSL)
3
Peak Reflow Temp. (°C)
PB Free
Y
Lead/Ball Finish
Ni/Pd/Au

Package Material Declaration

IPC 1752 Material Declaration

Last Update: Aug 29, 2012

RoHS Analysis Certificates (CoA) for Direct Materials

Please click here

Device Qualification Reports

FIT/MTBF, ESD (HBM/CDM) and Latch-up data available in the Device Qualification Report.

Technical Documents

Development Kits/Boards (10)

Software and Drivers (2)

Product Change Notice (PCN) (19)

Feb 10, 2016
Qualification of Grace Semiconductor as an Additional Wafer Foundry Site for
Feb 10, 2016
Qualification of Grace Semiconductor as an Alternate Wafer Foundry Site for SONOS4 Technology, PSoC CY8C27x Device Family
Feb 10, 2016
This is a correction to the Method of Identification section in the just released PCN#071421. Qualification of Grace Semiconductor as an Alternate Wafer Foundry Site for SONOS4 Technology, PSoC CY8C27x Device Family
Feb 10, 2016
Qualification of 0.9-mil Au wire diameter for CCD and MID devices assembled at CML
Feb 10, 2016
Change in Tube Bundling Ship Process
Feb 10, 2016
Correction to Affected Devices in PCN#071577: Qualification of 0.9-mil Au wire diameter for CCD and MID devices assembled at CML
Feb 10, 2016
Add Alternate Assembly Site for SOIC150mils Pb-Free
Feb 10, 2016
Qualification of KYOCERA KE-G3000DA as new MOLD COMPOUND for Pb-free packages built in Cypress Manufacturing Limited
Feb 10, 2016
Advance PCN - Qualification of Grace Semiconductor as an Alternate Wafer Foundry Site for S4 Technology
Feb 10, 2016
Qualification of Cypress Minnesota Inc. (CMI) as Second Source to SONOS4 Process, PSoC CY8C27X43 Device Family.
Feb 10, 2016
Shipping Label Upgrade
Feb 08, 2016
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products
Feb 08, 2016
Changes to Minimum Order Quantity (MOQ) and Order Increment (OI) values on various Cypress Products.
Feb 08, 2016
PSoC Product Datasheet Changes
Feb 08, 2016
Transfer of package manufacturing from Cypress Philippines to Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET) for select SOIC products
Feb 08, 2016
Qualification of Copper Palladium Wire Bonds for Select Lead Frame Products at JCET China
Feb 07, 2016
Planned Qualification of Spansion Manufacturing Sites for Cypress Products
Feb 07, 2016
Q1, 2012 - Q2, 2013 Horizon Report
Oct 04, 2012
Q2, 2012 - Q4, 2013 Horizon Report

Product Information Notice (PIN) (4)

Feb 05, 2016
Addendum to PIN 135258 - Qualification of JCET as an additional Test and Finish Location for Cypress Products
Feb 05, 2016
Changes to Cypress Address Labels
Feb 05, 2016
GSMC Merger with HH-NEC to Form HHGrace Semiconductor Manufacturing Corporation
Feb 05, 2016
Qualification of Test 25 (Austin, Texas) as an Additional Wafer-Level Test Location.

User Module Datasheets (64)

Programming Specifications (1)

Reference Designs (1)

IBIS (1)

Jun 08, 2012

Technical Articles (3)