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Spansion Launches MirrorBit(R) SPI Multi-I/O Flash Memory With Up to 40MB/s Read Performance | Cypress Semiconductor

Spansion Launches MirrorBit(R) SPI Multi-I/O Flash Memory With Up to 40MB/s Read Performance

Last Updated: May 20, 2009

Matches or Exceeds Conventional Parallel NOR Flash Memory Speed

SUNNYVALE, Calif., May 20, 2009 -- Spansion Inc., the world's largest pure-play provider of Flash memory solutions, today announced a new family of Serial Peripheral Interface (SPI) MirrorBit(R) Multi-I/O Flash Memory devices that deliver breakthrough performance. The family includes devices from 32-megabits (Mb) up to 128-megabits. Each device supports the option for single (one-bit data bus), dual (two-bit data bus) or quad (four-bit data bus) serial I/O data transmission, enabling manufacturers to more easily manage inventory and support multiple product models using a single SPI device. Leading performance of up to 40MB/s (80 MHz per I/O in quad I/O mode) makes the MirrorBit SPI Multi-I/O family capable of executing code in-place (XIP) for a variety of industrial and consumer electronics applications with performance that matches or exceeds conventional parallel I/O NOR Flash memory. Manufactured using Spansion's highly competitive 90-nanometer (nm) MirrorBit technology, the new Flash memory solutions can help manufacturers take advantage of the lower overall system costs that the serial interface enables, while offering the high performance and reliability that applications demand. The 32 Mb device is shipping in volume production today.

"The Spansion MirrorBit SPI Multi-I/O family is the perfect fit for current market trends. Our customers are looking to reduce pin-count and cost without sacrificing performance," said Tom Eby, executive vice president of Spansion's Consumer, Set-Top Box & Industrial Division. "Spansion's SPI Multi-I/O family is the lowest pin-count Flash memory with standard parallel I/O NOR-type performance. With this latest offering, Spansion anticipates a rapid expansion in customer adoption of SPI solutions."

SPI devices typically read information serially, or one bit at a time, requiring fewer connections and thus fewer pins. This lowers cost, simplifies board layout and reduces the form factor of many embedded designs. For a 32 Mb density flash device, the total pin count reduces from 47 active pins on a typical parallel NOR flash to eight active pins for an SPI flash.

With multiple I/O, devices can transmit and receive data either one, two or four bits at a time, enabling faster speeds while still requiring only eight total pins or four active pins to retain the original benefits of single I/O SPI. The enhanced performance means that serial devices can be used to support faster XIP code execution, potentially reducing the amount of RAM required by the system with slower SPI solutions and enabling faster system power up times.

Spansion's MirrorBit SPI Multi-I/O devices are designed to address the performance, cost and volume demands of applications such as optical disk drives, personal computers and high-end printers, as well as networking and home entertainment equipment such as digital TV, DVD players/recorders and set-top boxes.

"With the higher performance of Spansion's SPI Multi-I/O architecture combined with the low cost structure of leading-edge MirrorBit technology there is now a path toward the implementation of much higher density SPI solutions in the future," added Eby.

The Spansion MirrorBit SPI Multi-I/O FL family features the industry's fastest serial read performance in addition to leading Multi-I/O throughput:

                       Serial I/O          Dual I/O          Quad I/O
    Data Throughput     13 MB/s            20 MB/s           40 MB/s
    Clock frequency     104 MHz            80 MHz*           80 MHz**

    * Effective clock frequency of 160 MHz
    ** Effective clock frequency of 320 MHz

In addition, the family offers:

    --  Enhanced security features via a freeze bit, locking the memory array
        and preventing additional writes to the device memory;
    --  A flexible sector architecture, providing small sector options (4KB or
        8KB) for parameter data storage;
    --  One Time Programmable (OTP) area for permanent, secure identification.

All devices use a Universal Footprint with consistent packaging and pin outs, enabling users to migrate from lower to higher density serial Flash memory without having to alter board layouts. The Universal Footprint gives manufacturers the efficiency to develop solutions based on a single platform and leverage their hardware and software design across multiple product lines, quickening time-to-market.

Packaging and Availability

The 32 Mb S25FL032P MirrorBit SPI Multi-I/O device is available in 8-pin SOIC (208 mil), 16-pin SOIC, USON (6mm x 5mm) or WSON (6mm x 8mm) packages. The 64 Mb S25FL064P and 128 Mb S25FL129P MirrorBit SPI Multi-I/O devices are available in 16-pin SOIC or 8-contact WSON (6mm x 8mm) packages. The 32 Mb device is in full production now. The company expects to sample and be in production of the 64Mb device in June 2009, and the 128 Mb device in Q4 2009.

About Spansion

Spansion (Pink Sheets: SPSNQ.PK) is a leading Flash memory solutions provider, dedicated to enabling, storing and protecting digital content in wireless, automotive, networking and consumer electronics applications. Spansion, previously a joint venture of AMD and Fujitsu, is the largest company in the world dedicated exclusively to designing, developing, manufacturing, marketing, selling and licensing Flash memory solutions. For more information, visit

NOTE: Spansion(R), the Spansion Logo, MirrorBit(R), and combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners.


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