Spansion Initiates Production of 300mm 65nm MirrorBit(R) Flash Memory at SP1 Wafer Fabrication Facility | Cypress Semiconductor
Spansion Initiates Production of 300mm 65nm MirrorBit(R) Flash Memory at SP1 Wafer Fabrication Facility
Ceremony Celebrating the World's First 300mm NOR Facility Held for Customers, Government and Community Officials
AIZUWAKAMATSU, Japan, Sept 19, 2007 --
Spansion Inc. (Nasdaq: SPSN), the world's largest pure-play provider of Flash memory solutions, today announced that it has started production of MirrorBit(R) technology at 65nm on 300mm wafers at its Spansion 1 (SP1) facility in Japan, with plans to ship to customers in high volume by the end of the year. To celebrate this milestone, Spansion held a dedication ceremony at SP1, which is the world's first 300mm NOR manufacturing facility and is integral to Spansion's strategy to produce leading-edge differentiated Flash memory solutions. During the ceremony, Spansion executives demonstrated working silicon of MirrorBit technology at 65nm and gave a tour of the fab. Photos from inside SP1 can be viewed on the press site of Spansion's website at http://www.spansion.com/about/news.html
The SP1 wafer manufacturing site is the first factory constructed by Spansion since becoming an independent company. Spansion has invested a significant portion of its planned $1.2 billion to construct and equip SP1. Spansion expects that this investment will produce capacity of 15,000-20,000 300mm wafers per month. With additional investment, Spansion has the capability to expand capacity to produce 30,000-40,000 wafers per month in the future. Spansion plans to produce leading-edge products at SP1, such as MirrorBit Eclipse(TM) devices, with products at 45nm expected in 2008. SP1 is co-located with Spansion's other fab in Aizu, JV3, and shares some resources with JV3 such as employees and facilities.
"We are on schedule for scaling MirrorBit technology to 45nm on 300mm wafers," said Bertrand Cambou, president and CEO, Spansion. "By leveraging this next-generation facility, and the cost and technology advantages of MirrorBit technology, we can deliver on our promise to bring more value to our customers and redefine the Flash memory industry."
From R&D to Production
Spansion started the 300mm development at its MirrorBit technology-dedicated R&D center in Silicon Valley, Submicron development Center (SDC). The 65nm MirrorBit technology process was developed at the SDC and has since been transferred to SP1 for production. The SDC is now currently running full flow development 300 millimeter wafers, 45nm technology, which is targeted for transfer to SP1 in 2008. The SDC is the only 300mm NOR Flash memory R&D facility in California.
MirrorBit technology offers higher yields than traditional floating-gate NOR, and scales more easily to higher densities. When compared with floating- gate NOR technology, MirrorBit technology offers a simpler memory cell, which requires fewer critical manufacturing steps to produce than competing floating-gate technologies. As a result, MirrorBit technology can be produced at a lower overall wafer cost.
Spansion's aggressive process technology roadmap features the transition to a new process node each year. Spansion leverages a single technology, MirrorBit, in all of its fabs for efficient production of code and data storage solutions.
Spansion's wafer fab capabilities include: -- Spansion's SP1 300mm fab in Aizu-Wakamatsu, Japan for future 65nm and 45nm MirrorBit products -- Spansion's Fab 25 facility in Austin, Texas for 90nm and future 65nm MirrorBit products -- Spansion's JV3 facility in Aizu-Wakamatsu, Japan for 110nm MirrorBit capacity. This is Spansion's primary internal aluminum fab. -- Foundry relationship with TSMC for 110nm and 90nm MirrorBit technology to help ensure capacity during times of peak demand -- Foundry relationship with Fujitsu for MirrorBit and/or floating-gate aluminum metal layer products on 320nm, 230nm, and 200nm nodes primarily for CSID (Consumer, Set Top Box, and Industrial) Division. Key Facts about SP1 Building Structure: Three-story building Site Area: 123,515m2 (SP1 + JV3) Floor Area: 36,482m2 Area of Clean Room: 13,800m2 Start of Production: Sept 18 Products Produced: MirrorBit products at 65nm in 2007; MirrorBit products at 45nm in 2008 Location: 2, Takaku-Kogyodanchi, Aizuwakamatsu-shi, Fukushima, 965-0060 General Manager: Mikio Suetake Manufacturing Employees: Approximately 950 full-time employees (SP1 + JV3)
Spansion in Japan
Spansion Japan has approximately 2,000 employees, with Japan Headquarters in Kawasaki-city; its SP1 and JV-3 fabs in Aizu-Wakamatsu; and a design center near Nagoya-city. Spansion Japan serves the Japan market through the Fujitsu sales channel.
Webcast Replay of Press Conference
Spansion will post slides from its press conference being held at SP1 at 10:45 pm Pacific time on September 18, 2:45 p.m. in Aizu at the investor's section of the Spansion website- http://investor.spansion.com/overview.cfm A replay of the press conference will be posted by September 20 at http://investor.spansion.com/overview.cfm
Spansion is a leading Flash memory solutions provider, dedicated to enabling, storing and protecting digital content in wireless, automotive, networking and consumer electronics applications. Spansion, previously a joint venture of AMD and Fujitsu, is the largest company in the world dedicated exclusively to designing, developing, manufacturing, marketing and selling Flash memory solutions. For more information, visit http://www.spansion.com.
This release contains forward-looking statements that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995, including statements regarding plans to ship 65nm Flash memory chips manufactured from 300mm wafers to customers in high volume by the end of the year; the expectation that Spansion will make a $1.2 billion investment to construct and equip SP1, and that such investment will yield a capacity of 15,000-20,000 300mm wafers per month; the belief that SP1 could be expanded to produce 30,000-40,000 wafers per month in the future; plans to produce leading-edge products at SP1, such as MirrorBit Eclipse(TM) devices and 45nm devices in 2008; and the plan to transfer 300 millimeter wafer, 45nm technology to SP1 in 2008. Investors are cautioned that the forward-looking statements in this release involve risks and uncertainties that could cause actual results to differ materially from the company's current expectations. For risks that the Company considers to be the important factors that could cause actual results to differ materially from those set forth in the forward-looking statements, the Company urges investors to review in detail the risks and uncertainties in the Company's Securities and Exchange Commission filings, including but not limited to the company's Annual Report on Form 10-K for the fiscal year ended December 31, 2006 and quarterly report on Form 10-Q for the fiscal quarter ended July 1, 2007.
Spansion(R), the Spansion logo, MirrorBit(R), MirrorBit(R) Eclipse(TM), ORNAND(TM), HD-SIM(TM) and combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners.