X1 and X2 clock multiplier outputs of CY7B994V with no reference | Cypress Semiconductors
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X1 and X2 clock multiplier outputs of CY7B994V with no reference
Last Updated: September 11, 2011
What frequencies can be expected at the X1 and X2 clock multiplier outputs in CY7B994V Clock part in the absence of any reference clock?
In the absence of a reference clock, the PLL is expected to lock to the zero frequency input. It will therefore run at a frequency below the specified range for the device, but still in the MHz range. For example, if FS = Low, fNOM will probably be somewhere in the range of 1 MHz to 20 MHz. It may have much higher jitter than when it is operating normally.