What is the Stabilitity of the PSoC ADC? | Cypress Semiconductor
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What is the Stabilitity of the PSoC ADC?
Title: ADC Stability
What is the stability of the PSoC ADC?
The stability of the ADC depends on the reference used. From the datasheet, the worst-case ground reference offset is 50mV and the worst-case gain error over full scale is 2.5% over the full temperature range.