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Voltage at WP# and HOLD# Pins on S25FL1xxK SPI Flash When Floating - KBA218527 | Cypress Semiconductor

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Voltage at WP# and HOLD# Pins on S25FL1xxK SPI Flash When Floating - KBA218527

Last Updated: March 12, 2017
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Question: 

For the S25FL1xxK SPI Flash, the WP# and HOLD# input signal pin will not be used, and will be left floating. What is the expected ViH level at these two signal pins, after initial power ON? 

Answer: 

The S25FL1xxK series has internal pull-ups on WP# and HOLD# pins, and will be at ViH when left unconnected (floating). Assuming that 10x or low capacitive-loading probes are used to measure the voltage, the ViH level measured at WP# and HOLD# will be ViH = VCC x 0.7 (typical). As an example, when VCC = 3.0 V, the expected ViH level measured at WP# and HOLD# pins will be ~2.1 V, after initial power ON. 

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