Using multiple devices to create a wider data path for synchronous dual port SRAM's | Cypress Semiconductor
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Using multiple devices to create a wider data path for synchronous dual port SRAM's
How can multiple dual-port devices be combined to create a wider data path?
Can I width cascade multiple dual-ports?
How would I set up the dual-port for width expansion?
The devices must be arranged in a width-expansion configuration on the board. Each port has its own address, control, clock, and data signals (as with any dual-port system). In width expansion, the address, control, and clock signals are routed in parallel to the same port on each device. The tracelengths to each device should be similar and should account for all device timing parameters. The data path is split between the devices. For example, to create a 36-bit data path from 18-bit dual-ports, data[35:18] is routed to device A and data[17:0] is routed to device B. The same procedure is done for both ports.