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Using internal voltage regulator for enCoRe II | Cypress Semiconductor

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Using internal voltage regulator for enCoRe II

Last Updated: November 29, 2011

How can I use the enCoRe II internal voltage regulator?

The voltage regulator is enabled by setting the VREG enable bit (bit [0]) in the VREGCR register. An output cap (0.1µF or larger ceramic capacitor) should be loaded (at P1.2) close to the output pin when using the VREG output. This cap should be removed when the VREG output is used as a GPIO. The voltage regulator only functions within specifications when the VCC voltage is above 4.35V.

The emulation pods also have a place to hold the output cap if the internal 3.3V regulator is used. This cap should be removed if the pod is used later for emulation in a design that uses the VREG pin as a GPIO.

Pins P1.3 to P1.6 can use alternate drive of 3.3V only if the Vreg capability is enabled in the enCoRe II devices

In the USB suspend mode, current drawn should be minimal. The VREG feature, when enabled draws a minimum of at least 500µA. So, in the USB suspend, VREG should be disabled or configured in the "Keep Alive" mode (Keep Alive mode can be configured by enabling a bit (bit [1]) in the VREGCR register). This feature enables light loads of up to 20µA to be loosely regulated around 3.3V.

The enCoRe II data sheet can be viewed by clicking here:

enCoRe II Data-sheet

Keywords: enCoRe II, voltage regulator, VREG, VREGCR.

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