Trip Voltage and EEPROM Access of ISD-300A1 | Cypress Semiconductor
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Trip Voltage and EEPROM Access of ISD-300A1
What is the POR trip voltage and time to first EEPROM access for the ISD-300A1?
Worst-case measurement for POR trip is 1.06V. The time between power stabilization and first EEPROM access is approximately 2ms. This time will vary slightly (+/-20us) from chip to chip.
Please note that the ISD-300A1 is obsolete and the functional replacement is AT2LP. All the related collaterals of AT2LP can be found in the link here