tkl and tkh Parameter in QDR SRAMs | Cypress Semiconductor
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tkl and tkh Parameter in QDR SRAMs
Is there a cause for concern if this timing parameter is not met?
If you are not going to meet this parameter then the output of the input clock buffer will be an unknown state. Propagation of this unknown state results in improper latching of all other signals, as all the other signals are latched in on the rising edge of the clock. This would lead to the SRAM failing. For the input clock buffer to properly latch in the clock signal both the tKH and tKL parameters should be met.