SX2's response to SET_INTERFACE request | Cypress Semiconductor
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SX2's response to SET_INTERFACE request
Last Updated: April 30, 2012
How is SX2's response to SET_INTERFACE request different from its response to other EP0 requests ?
SET_INTERFACE is a standard EP0 request with no data phase. Though SET_INTERFACE is a standard EP0 request it needs to be handled by external master to perform all the changes in Endpoint configuration. So SX2 notifies the external master with the SETUP interrupt.
In case of other non-standard EP0 requests with no data stage, external master is notified with the SETUP interrupt, and the external master can accept the packet and complete the handshake phase by writing zero to the byte count register. SX2 waits for the external master to write zero into byte count register before acknowledging it.
But unlike the case of non-standard EP0 requests with no data phase, SX2 doesn't wait for external master to write zero into byte count register in the case of SET_INTERFACE. Instead SX2 acknowledges the transfer by itself.
As per the USB protocol, standard EP0 Device requests without a data stage must be completed in 50ms. If it is not responded to within 50ms, the host will reset the device. To avoid this, SX2 is made to 'ACK' the SET_INTERFACE by itself, without waiting for the external master to write zero into the byte count register.
So, if the SET_INTERFACE request is followed by another EP0 request, unless the firmware is fast enough to read the SETUP packet of SET_INTERFACE before the host writes into register,0x32, with the SETUP PACKET of the next command, the commands will get mixed up. Either by making firmware fast enough to read the first setup packet before the arrival of the next setup packet, or having the host issue the second command after the first command has been attended to, can help you to read both the setup packets, without mixing them up.