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Switching IFCLK source in SX2. | Cypress Semiconductor

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Switching IFCLK source in SX2.

Last Updated: May 24, 2011

Can the IFCONFIG be set to synchronous (with a driven external IFCLK pin) on power up or is it necessary to have the device first power up in asynchronous mode and then switch to synchronous? What should one be aware of while switching from asynchronous to synchronous ?


The minimum clock frequency on IFCLK is 5 MHz, so one can't shut it down. The reason being , the logic needs to be alive enough to keep up communications with the SIE to know when to update packet pointers.

First of all make sure that external IFCLK is free-running. There cannot be any stoppages in the clock. The external IFCLK source must be present before the SX2 configures the IFCONFIG register to set the part in synchronous mode. The SX2 comes up with the internal IFCLK source selected, so power-on configuration is not an issue.

However, typically, the IFCLK will be generated from an external master. The external master  must  guarantee that IFCLK comes on before the SX2 IFCONFIG  register write occurs to set the part in synchronous mode using external input to IFCLK.  This will keep things in sync.

So yes, one can change the IFCONFIG register in from async to sync  (with a driven IFCLK).   



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